Careers@AheadComputing

​Responsibilities

• You will create and utilize tools to identify and root cause digital logic bugs in an advanced CPU design

• You will have a key role in developing methodologies to accelerate correct-by-construction design and verification

• You will be a steward of digital design collateral by using standards-based tools wherever appropriate and writing new standards-based tools when business requirements demand

• You will drive convergence towards a fully verified soft IP

Qualifications & Skills

• Advanced degree in Computer Engineering, Computer Science, or a related area​

• 6+ years of pre-silicon logic design verification experience working on microprocessors

• Experience working with SystemVerilog and Python

• Expert problem solving skills​

Responsibilities

• You will innovate and define features to target power, performance, area, and timing goals

• You will develop and refine microarchitecture, and write high-level architecture specification

• You will write RTL of complex IP subsystems 

• You will explore high performance strategies and validate that the RTL design meets targeted performance

 

Qualifications and Skills

• Thorough knowledge of microprocessor architecture and microarchitecture including high performance and low power trade-offs

• Thorough knowledge of performance model development

• Verilog/System Verilog development experience or desire to learn and quickly ramp on RTL design

• Experience using an interpretive language such as Perl or Python

• Expert problem solving skills

​Reponsibilities

• You will develop and refine microarchitecture, write design specification, and deliver and maintain RTL of complex IP subsystems to target power, performance, area, and timing goals

• You will support test bench development and work with validation engineers to effectively test and debug core/subsystem-level RTL in simulation, prototyping platforms and silicon

• You will explore high performance strategies and validate that the RTL design meets targeted performance

• You will work with multi-functional engineering team to physically realize RTL using high performance process technologies and validate physical design on the aspects of timing, area, reliability, testability and power

Qualifications & Skills

• Thorough knowledge of microprocessor architecture and microarchitecture including high performance and low power trade-offs

• SystemVerilog development experience

• Experience with high frequency design considerations (timing, power, multiple clock domains, etc.)

• Experience with typical front-end tools including: Verilog simulators, waveform viewers, and linting tools, as well as logic synthesis and place and route

• Experience in C/C++ & Python programming

• Expert problem solving skills